GBDK 2020 Docs  4.1.1
API Documentation for GBDK 2020
hardware.h
Go to the documentation of this file.
1 
5 #ifndef _HARDWARE_H
6 #define _HARDWARE_H
7 
8 #include <types.h>
9 
10 #define __BYTES extern UBYTE
11 #define __BYTE_REG extern volatile UBYTE
12 
13 static volatile SFR AT(0x3E) MEMORY_CTL;
14 
15 #define MEMCTL_JOYON 0b00000000
16 #define MEMCTL_JOYOFF 0b00000100
17 #define MEMCTL_BASEON 0b00000000
18 #define MEMCTL_BASEOFF 0b00001000
19 #define MEMCTL_RAMON 0b00000000
20 #define MEMCTL_RAMOFF 0b00010000
21 #define MEMCTL_CROMON 0b00000000
22 #define MEMCTL_CROMOFF 0b00100000
23 #define MEMCTL_ROMON 0b00000000
24 #define MEMCTL_ROMOFF 0b01000000
25 #define MEMCTL_EXTON 0b00000000
26 #define MEMCTL_EXTOFF 0b10000000
27 
28 static volatile SFR AT(0x3F) JOY_CTL;
29 
30 #define JOY_P1_LATCH 0b00000010
31 #define JOY_P2_LATCH 0b00001000
32 
33 static volatile SFR AT(0x7E) VCOUNTER;
34 
35 static volatile SFR AT(0x7F) PSG;
36 
37 #define PSG_LATCH 0x80
38 
39 #define PSG_CH0 0b00000000
40 #define PSG_CH1 0b00100000
41 #define PSG_CH2 0b01000000
42 #define PSG_CH3 0b01100000
43 
44 #define PSG_VOLUME 0b00010000
45 
46 static volatile SFR AT(0x7F) HCOUNTER;
47 
48 static volatile SFR AT(0x98) VDP_DATA;
49 static volatile SFR AT(0x99) VDP_CMD;
50 static volatile SFR AT(0x99) VDP_STATUS;
51 
52 #define STATF_INT_VBL 0b10000000
53 #define STATF_9_SPR 0b01000000
54 #define STATF_SPR_COLL 0b00100000
55 
56 #define VDP_REG_MASK 0b10000000
57 #define VDP_R0 0b10000000
58 extern UBYTE shadow_VDP_R0;
59 
60 #define R0_DEFAULT 0b00000000
61 #define R0_CB_OUTPUT 0b00000000
62 #define R0_CB_INPUT 0b01000000
63 #define R0_IE2_OFF 0b00000000
64 #define R0_IE2 0b00100000
65 #define R0_IE1_OFF 0b00000000
66 #define R0_IE1 0b00010000
67 #define R0_SCR_MODE1 0b00000000
68 #define R0_SCR_MODE2 0b00000010
69 #define R0_SCR_MODE3 0b00000100
70 #define R0_ES_OFF 0b00000000
71 #define R0_ES 0b00000001
72 
73 #define VDP_R1 0b10000001
74 extern UBYTE shadow_VDP_R1;
75 
76 #define R1_DEFAULT 0b10000000
77 #define R1_DISP_OFF 0b00000000
78 #define R1_DISP_ON 0b01000000
79 #define R1_IE_OFF 0b00000000
80 #define R1_IE 0b00100000
81 #define R1_SCR_MODE1 0b00010000
82 #define R1_SCR_MODE2 0b00000000
83 #define R1_SCR_MODE3 0b00000000
84 #define R1_SPR_8X8 0b00000000
85 #define R1_SPR_16X16 0b00000010
86 #define R1_SPR_MAG 0b00000001
87 #define R1_SPR_MAG_OFF 0b00000000
88 
89 #define VDP_R2 0b10000010
90 extern UBYTE shadow_VDP_R2;
91 
92 #define R2_MAP_0x3800 0xFF
93 #define R2_MAP_0x3000 0xFD
94 #define R2_MAP_0x2800 0xFB
95 #define R2_MAP_0x2000 0xF9
96 #define R2_MAP_0x1800 0xF7
97 #define R2_MAP_0x1000 0xF5
98 #define R2_MAP_0x0800 0xF3
99 #define R2_MAP_0x0000 0xF1
100 
101 #define VDP_R3 0b10000011
102 extern UBYTE shadow_VDP_R3;
103 #define VDP_R4 0b10000100
104 extern UBYTE shadow_VDP_R4;
105 #define VDP_R5 0b10000101
106 extern UBYTE shadow_VDP_R5;
107 
108 #define R5_SAT_0x3F00 0xFF
109 #define R5_SAT_MASK 0b10000001
110 
111 #define VDP_R6 0b10000110
112 extern UBYTE shadow_VDP_R6;
113 
114 #define R6_BANK0 0xFB
115 #define R6_DATA_0x0000 0xFB
116 #define R6_BANK1 0xFF
117 #define R6_DATA_0x2000 0xFF
118 
119 #define VDP_R7 0b10000111
120 extern UBYTE shadow_VDP_R7;
121 #define VDP_RBORDER 0b10000111
123 
124 #define R7_COLOR_MASK 0b11110000
125 
126 #define VDP_R8 0b10001000
127 extern UBYTE shadow_VDP_R8;
128 #define VDP_RSCX 0b10001000
129 extern UBYTE shadow_VDP_RSCX;
130 
131 #define VDP_R9 0b10001001
132 extern UBYTE shadow_VDP_R9;
133 #define VDP_RSCY 0b10001001
134 extern UBYTE shadow_VDP_RSCY;
135 
136 #define VDP_R10 0b10001010
137 extern UBYTE shadow_VDP_R10;
138 
139 #define R10_INT_OFF 0xFF
140 #define R10_INT_EVERY 0x00
141 
142 static volatile SFR AT(0xDC) JOY_PORT1;
143 
144 #define JOY_P1_UP 0b00000001
145 #define JOY_P1_DOWN 0b00000010
146 #define JOY_P1_LEFT 0b00000100
147 #define JOY_P1_RIGHT 0b00001000
148 #define JOY_P1_SW1 0b00010000
149 #define JOY_P1_TRIGGER 0b00010000
150 #define JOY_P1_SW2 0b00100000
151 #define JOY_P2_UP 0b01000000
152 #define JOY_P2_DOWN 0b10000000
153 
154 static volatile SFR AT(0xDD) JOY_PORT2;
155 
156 #define JOY_P2_LEFT 0b00000001
157 #define JOY_P2_RIGHT 0b00000010
158 #define JOY_P2_SW1 0b00000100
159 #define JOY_P2_TRIGGER 0b00000100
160 #define JOY_P2_SW2 0b00001000
161 #define JOY_RESET 0b00010000
162 #define JOY_P1_LIGHT 0b01000000
163 #define JOY_P2_LIGHT 0b10000000
164 
165 static volatile SFR AT(0xF0) FMADDRESS;
166 static volatile SFR AT(0xF1) FMDATA;
167 static volatile SFR AT(0xF2) AUDIOCTRL;
168 
169 static volatile SFR AT(0xfc) MAP_FRAME0;
170 static volatile SFR AT(0xfd) MAP_FRAME1;
171 static volatile SFR AT(0xfe) MAP_FRAME2;
172 static volatile SFR AT(0xff) MAP_FRAME3;
173 
174 extern const UBYTE _BIOS;
175 
176 extern const UBYTE _SYSTEM;
177 
178 #define SYSTEM_PAL 0x00
179 #define SYSTEM_NTSC 0x01
180 
181 extern volatile UBYTE VDP_ATTR_SHIFT;
182 
183 #define VBK_TILES 0
184 #define VBK_ATTRIBUTES 1
185 
186 #define VDP_SAT_TERM 0xD0
187 
188 #if defined(__TARGET_msxdos)
189 #define DEVICE_SCREEN_X_OFFSET 0
190 #define DEVICE_SCREEN_Y_OFFSET 0
191 #define DEVICE_SCREEN_WIDTH 32
192 #define DEVICE_SCREEN_HEIGHT 24
193 #define DEVICE_SCREEN_BUFFER_WIDTH 32
194 #define DEVICE_SCREEN_BUFFER_HEIGHT 28
195 #define DEVICE_SCREEN_MAP_ENTRY_SIZE 2
196 #define DEVICE_SPRITE_PX_OFFSET_X 0
197 #define DEVICE_SPRITE_PX_OFFSET_Y -1
198 #define DEVICE_WINDOW_PX_OFFSET_X 0
199 #define DEVICE_WINDOW_PX_OFFSET_Y 0
200 #else
201 #error Unrecognized port
202 #endif
203 #define DEVICE_SCREEN_PX_WIDTH (DEVICE_SCREEN_WIDTH * 8)
204 #define DEVICE_SCREEN_PX_HEIGHT (DEVICE_SCREEN_HEIGHT * 8)
205 
206 #endif
UINT8 UBYTE
Definition: types.h:60
#define AT(A)
Definition: types.h:34
#define SFR
Definition: types.h:33
volatile UBYTE VDP_ATTR_SHIFT
UBYTE shadow_VDP_R9
UBYTE shadow_VDP_RBORDER
UBYTE shadow_VDP_R5
UBYTE shadow_VDP_RSCY
UBYTE shadow_VDP_R7
UBYTE shadow_VDP_R1
const UBYTE _SYSTEM
const UBYTE _BIOS
UBYTE shadow_VDP_R2
UBYTE shadow_VDP_R6
UBYTE shadow_VDP_R0
UBYTE shadow_VDP_R3
UBYTE shadow_VDP_R8
UBYTE shadow_VDP_R10
UBYTE shadow_VDP_RSCX
UBYTE shadow_VDP_R4